# Compiler design homework assignment

The goal is to create a compiler from a subset of Java (JavaLi) to 32bit Intel assembly. The structure is the following:

* HW0: write an assembly program that reads numbers (not graded). [PDF](./docs/hw0.pdf)
* HW1: implement a code generator that translates assignment statements to IA32. [PDF](./docs/hw1/hw1.pdf)
* HW2: construct a lexer (lexical analyzer) and a parser (syntax analyzer) for the complete JavaLi programming language. [PDF](./docs/hw2/hw2.pdf)
* HW3: develop a semantic analyzer. [PDF](./docs/hw3.pdf)
* HW4: build a IA32 back-end for the compiler, a generator of IA32 for the complete JavaLi language. [PDF](./docs/hw4.pdf)
* HWB: implement as many optimizations as possible (focusing on speed and correctness). [PDF](./docs/hw5.pdf)
* HWC: review the code of other teams for HW1 and write up a report. [PDF](./docs/hwc.pdf)
* HWD: review the code of other teams for HW4 and write up a report. [PDF](./docs/hwd.pdf)

Follow the commit history to obtain the code at the end of each assignment.

## License

Copyright (c) 2018 Carlos Galindo, Levin Moser, teaching group of Compiler Design (ETH Zürich). All rights reserved.